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CY7C1327G - 4-Mbit Pipelined Sync SRAM

Description

The CY7C1327G SRAM integrates 256K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK).

Features

  • Registered inputs and outputs for pipelined operation.
  • 256K × 18 common I/O Architecture.
  • 3.3 V core power supply (VDD).
  • 2.5 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 3.5 ns (for 166-MHz device).
  • Provide high performance 3-1-1-1 access rate.
  • User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self-timed writes.
  • Asynchrono.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1327G 4-Mbit (256K × 18) Pipelined Sync SRAM 4-Mbit (256K × 18) Pipelined Sync SRAM Features ■ Registered inputs and outputs for pipelined operation ■ 256K × 18 common I/O Architecture ■ 3.3 V core power supply (VDD) ■ 2.5 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 3.
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