CY7C1329 Overview
The CY7C1329 is a 3.3V, 64K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. PowerPC is a trademark of IBM Corporation.
CY7C1329 Key Features
- Supports 133-MHz bus for Pentium® and PowerPC™ operations with zero wait states
- Fully registered inputs and outputs for pipelined operation
- 64K x 32 mon I/O architecture
- Single 3.3V power supply
- Fast clock-to-output times
- 4.2 ns (for 133-MHz device)
- 5.5 ns (for 100-MHz device)
- 7.0 ns (for 75-MHz device
- User-selectable burst counter supporting Intel® Pentium interleaved or linear burst sequences
- Separate processor and controller address strobes