Datasheet Details
| Part number | CY7C1370B |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 811.36 KB |
| Description | (CY7C1370B / CY7C1372B) 512K X 36/1M X 18 Pipelined SRAM |
| Datasheet |
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| Part number | CY7C1370B |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 811.36 KB |
| Description | (CY7C1370B / CY7C1372B) 512K X 36/1M X 18 Pipelined SRAM |
| Datasheet |
|
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|
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The CY7C1370B and CY7C1372B SRAMs are designed to eliminate dead cycles when transitions from Read to Write or vice versa.
These SRAMs are optimized for 100 percent bus utilization and achieve Zero Bus Latency.