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CY7C1421AV18 Datasheet 1.8v Synchronous Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1417AV18 CY7C1428AV18 CY7C1419AV18 CY7C1421AV18 36-Mbit DDR-II SRAM 4-Word Burst.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36).
  • 300-MHz clock for high bandwidth.
  • 4-Word burst for reducing address bus frequency.
  • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz.
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches.
  • Echo clocks (CQ and CQ) simplify data captu.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C142 2K x 8 Dual-Port Static RAM
CY7C1420AV18 (CY7C14xxAV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1420BV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1420JV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1420KV18 36-Mbit DDR II SRAM Two-Word Burst Architecture
CY7C1422AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422BV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422JV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1423AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1423BV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

CY7C1421AV18 Distributor