CY7C1464AV25 - 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM

This page provides the datasheet information for the CY7C1464AV25, a member of the CY7C1460AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM family.

Product Overview

Cypress Semiconductor

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Datasheet Details

Part number	CY7C1464AV25
Manufacturer	Cypress Semiconductor
File Size	483.27 KB
Description	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM
Datasheet	CY7C1464AV25 Datasheet
Additional preview pages of the CY7C1464AV25 datasheet.

CY7C1464AV25 Product details

Description

SRAMs with No Bus Latency™ (NoBL™) logic, respectively.

Read/Write operations with no wait states.

Features

Pin-compatible and functionally equivalent to ZBT™.
Supports 250-MHz bus operations with zero wait states.
Available speed grades are 250, 200 and 167 MHz.
Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
Fully registered (inputs and outputs) for pipelined operation.
Byte Write capability.
2.5V core power supply.
2.5V/1.8V I/O power supply.
Fast clock-to-output times.

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Other Datasheets by Cypress Semiconductor

CY7C1464AV33 - (CY7C146xAV33) 36-Mbit Pipelined SRAM
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CY7C1460AV33 - 36-Mbit Pipelined SRAM
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CY7C1460KV25 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1460KV33 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1460KVE25 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM

Published: Nov 7, 2006 |