Datasheet Summary
CY7C1460AV33 CY7C1462AV33
36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture
36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture
Features
- Pin patible and functionally equivalent to ZBT
- Supports 250 MHz bus operations with zero wait states
- Available speed grades are 250, 200 and 167 MHz
- Internally self timed output buffer control to eliminate the need to use asynchronous OE
- Fully registered (inputs and outputs) for pipelined operation
- Byte write capability
- 3.3 V power supply
- 3.3 V/2.5 V I/O power supply
- Fast clock-to-output times
- 2.6 ns (for 250 MHz device)
- Clock enable (CEN) pin to suspend operation
- Synchronous self timed writes
-...