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CY7C1521KV18 Datasheet 72-mbit Ddr Ii Sram Four-word Burst Architecture

Manufacturer: Cypress (now Infineon)

Overview: CY7C1521KV18 72-Mbit DDR II SRAM Four-Word Burst Architecture 72-Mbit DDR II SRAM Four-Word Burst.

Key Features

  • 72-Mbit Density (2M × 36).
  • 250 MHz Clock for High Bandwidth.
  • Four-word Burst for reducing Address Bus Frequency.
  • Double Data Rate (DDR) Interfaces (data transferred at 500 MHz) at 250 MHz.
  • Two Input Clocks (K and K) for precise DDR Timing.
  • SRAM uses rising edges only.
  • Two Input Clocks for Output Data (C and C) to minimize Clock Skew and Flight Time mismatches.
  • Echo Clocks (CQ and CQ) simplify Data Capture in High Speed Systems.
  • Synchronous Internally.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1521V18 1.8V Synchronous Pipelined SRAM
CY7C1520KV18 72-Mbit DDR-II SRAM Two-Word Burst Architecture
CY7C1520V18 1.8V Synchronous Pipelined SRAM
CY7C1522AV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1522JV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1522KV18 72-Mbit DDR II SIO SRAM 2-Word Burst Architecture
CY7C1522V18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523AV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523JV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523KV18 72-Mbit DDR II SIO SRAM 2-Word Burst Architecture

CY7C1521KV18 Distributor