CY7C4261 Datasheet | Cypress

CY7C4261, CY7C4271 16 K/32 K × 9 Deep Sync FIFOs 16K/32 K × 9 Deep Sync FIFOs Features - High speed, low power, first-in first-out (FIFO) memories - 16 K × 9 (CY7C4261) - 32 K × 9 (CY7C4271) - 0.5 micron CMOS for optimum speed and power - High speed 100 MHz operation (10 ns read/write cycle times) - Low power - ICC = 35 m A - Fully asynchronous and simultaneous read and write operation - Empty, full, half full, and programmable almost empty and almost full status flags - TTL patible - Output enable (OE) pins - Independent read and write enable pins - Center power and ground pins for reduced noise - Supports free running 50% duty cycle clock inputs - Width expansion capability - 32-pin PLCC and 32-pin TQFP - Pin patible density upgrade to CY7C42X1 family - Pin patible density upgrade to IDT72201/11/21/31/41/51 - Pb-free packages available Functional Description The CY7C4261/71 are high speed, low power FIFO memories with clocked read...