CY7C4265V Description
The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally patible to the CY7C42X5V Synchronous FIFO family. The CY7C4255/65/75/85V can be cascaded to increase FIFO depth.
CY7C4265V Key Features
- 3.3V operation for low power consumption and easy integration into low-voltage systems
- High-speed, low-power, first-in first-out (FIFO) memories
- 8K x 18 (CY7C4255V)
- 16K x 18 (CY7C4265V)
- 32K x 18 (CY7C4275V)
- 64K x 18 (CY7C4285V)
- 0.35 micron CMOS for optimum speed/power
- High-speed 100-MHz operation (10-ns read/write cycle times)
- Low power
- ICC = 30 mA