CYM1465A Datasheet | Cypress

65A .. 512K x 8 PDIP Static RAM Features - - - - - - - - 4.5V- 5.5V operation CMOS SRAM for optimum speed and power Low active power (165 mW max.) Low standby power (L Version)- (110 µW max) 2V data retention (L Version) JEDEC-patible pinout 32-pin, 0.6-inch-wide DIP package TTL-patible inputs and outputs an automatic power-down feature that reduces power consumption by more than 99% when deselected. Writing to the SRAM is acplished when the chip select (CS) and write enable (WE) inputs are both LOW. Data on the eight input/output pins (I/O0 through I/O7) of the device is then written into the memory location specified on the address pins (A0 through...