CYV15G0204TRB Datasheet | Cypress

Independent Clock HOTLink II™ Dual Serializer and Dual Reclocking Deserializer Features - Second-generation HOTLink® technology - pliant to SMPTE 292M and SMPTE 259M video standards - Dual-channel video serializer plus dual channel video reclocking deserializer - 195- to 1500-Mbps serial data signaling rate - Simultaneous operation at different signaling rates - Supports reception of either 1.485 or 1.485/1.001 Gbps data rate with the same training clock - Supports half-rate and full-rate clocking - Internal phase-locked loops (PLLs) with no external PLL ponents - Selectable differential PECL-patible serial inputs - Internal DC-restoration - Redundant differential PECL-patible serial outputs - No external bias resistors required - Signaling-rate controlled edge-rates - Internal source termination - Synchronous LVTTL parallel interface - JTAG boundary scan - Built-In Self-Test (BIST) for at-speed link testing - Link Quality Indicator - Analog signal detect - Digital signal detect - Low-power 2.5 W at 3.3 V typical - Single 3.3 V supply - Thermally enhanced BGA - Pb-free package option available - 0.25  Bi CMOS technology Functional Description The CYV15G0204TRB Independent Clock HOTLink II™ Dual Serializer and Dual Reclocking Deserializer is a point-to-point or point-to-multipoint munications building block enabling transfer of data over a variety of high-speed serial links including SMPTE 292M and SMPTE 259M video applications. It supports signaling rates in the range of 195 to 1500 Mbps per serial link. All transmit and receive channels are independent and can operate simultaneously at different rates. Each transmit channel accepts 10-bit parallel characters in an Input Register and converts them to serial data. Each receive channel accepts serial data and converts it to 10-bit parallel characters and presents these characters to an Output Register. The received serial data can also be reclocked and retransmitted through the...