Datasheet4U Logo Datasheet4U.com

CY29940 - 1:18 Clock Distribution Buffer

General Description

The CY29940 is a low-voltage 200 MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock.

The two clock sources can be used to provide for a test clock as well as the primary system clock.

Key Features

  • 200 MHz clock support.
  • LVPECL or LVCMOS/LVTTL clock input.
  • LVCMOS/LVTTL compatible inputs.
  • 18 clock outputs: drive up to 36 clock lines.
  • 60 ps typical output-to-output skew.
  • Dual or single supply operation:.
  • 3.3 V core and 3.3 V outputs.
  • 3.3 V core and 2.5 V outputs.
  • 2.5 V core and 2.5 V outputs.
  • Pin compatible with MPC940L, MPC9109.
  • Available in Commercial and Industrial temperature.
  • 32-pin TQFP package Block Diagram PECL_CLK PECL_CL.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY29942 1:18 Clock Distribution Buffer Cypress Semiconductor
CY29943 1:18 Clock Distribution Buffer Cypress Semiconductor
CY29946 1:10 Clock Distribution Buffer Cypress Semiconductor
CY29947 1:9 Clock Distribution Buffer Cypress Semiconductor
CY29948 1:12 Clock Distribution Buffer Cypress Semiconductor

Other Datasheets by Cypress (now Infineon)

Part Number Description
CY22392 Automotive Flash Programmable Clock Generator
CY2304 3.3V Zero Delay Buffer
CY2304NZ Four Output PCI-X and General Purpose Buffer
CY2305 Low Cost 3.3 V Zero Delay Buffer
CY2308 3.3V Zero Delay Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2.5 V or 3.3 V, 200 MHz, 1:18 Clock Distribution Buffer Features ■ 200 MHz clock support ■ LVPECL or LVCMOS/LVTTL clock input ■ LVCMOS/LVTTL compatible inputs ■ 18 clock outputs: drive up to 36 clock lines ■ 60 ps typical output-to-output skew ■ Dual or single supply operation: ❐ 3.3 V core and 3.3 V outputs ❐ 3.3 V core and 2.5 V outputs ❐ 2.5 V core and 2.5 V outputs ■ Pin compatible with MPC940L, MPC9109 ■ Available in Commercial and Industrial temperature ■ 32-pin TQFP package Block Diagram PECL_CLK PECL_CLK# TCLK TCLK_SEL VDD 0 1 CY29940 2.5 V or 3.3 V, 200 MHz, 1:18 Clock Distribution Buffer Functional Description The CY29940 is a low-voltage 200 MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock.