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CY29940 Datasheet 1:18 Clock Distribution Buffer

Manufacturer: Cypress (now Infineon)

Overview: 2.5 V or 3.3 V, 200 MHz, 1:18 Clock Distribution Buffer.

General Description

The CY29940 is a low-voltage 200 MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL patible input clock.

The two clock sources can be used to provide for a test clock as well as the primary system clock.

All other control inputs are LVCMOS/LVTTL patible.

Key Features

  • 200 MHz clock support.
  • LVPECL or LVCMOS/LVTTL clock input.
  • LVCMOS/LVTTL compatible inputs.
  • 18 clock outputs: drive up to 36 clock lines.
  • 60 ps typical output-to-output skew.
  • Dual or single supply operation:.
  • 3.3 V core and 3.3 V outputs.
  • 3.3 V core and 2.5 V outputs.
  • 2.5 V core and 2.5 V outputs.
  • Pin compatible with MPC940L, MPC9109.
  • Available in Commercial and Industrial temperature.
  • 32-pin TQFP package Block Diagram PECL_CLK PECL_CL.

More Datasheets from Cypress (now Infineon)

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CY23FS08 2.5V / 3.3V Zero Delay Buffer

CY29940 Distributor