CY62148GN Datasheet | Cypress

CY62148GN Mo BL® 4-Mbit (512K × 8) Static RAM 4-Mbit (512K × 8) Static RAM Features - Very high speed: 45 ns - Wide voltage range: 2.2 V to 3.6 V, 4.5 V to 5.5 V - Ultra low standby power - Typical standby current: 3.5 µA - Maximum standby current: 8.7 µA - Easy memory expansion with CE and OE Features - Automatic power-down when deselected - plementary metal oxide semiconductor (CMOS) for optimum speed and power - Available in Pb-free 32-pin thin small outline package (TSOP) II and 32-pin small-outline integrated circuit (SOIC) packages Functional Description The CY62148GN is a high-performance CMOS static RAM organized as 512K words by 8-bits. This device Features advanced circuit design to provide ultra low standby current. This is ideal for providing More Battery Life™ (Mo BL) in portable Logic Block Diagram applications. The device also has an automatic power-down feature that significantly reduces power consumption when addresses are not toggling. Placing the device in standby mode reduces power consumption by more than 99% when deselected (CE HIGH). The eight input and output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE HIGH), Outputs are disabled (OE HIGH), or during an active Write operation (CE LOW and WE LOW). To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18). To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. For a plete list of related documentation, click here. ROW DECODER SENSE AMPS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 CE WE INPUT BUFFER 512K x 8 ARRAY COLUMN DECODER POWER DOWN IIO/O00 IIO/O11 IIO/O22 IIO/O33 IIO/O44 IIO/O55 IIO/O66 IIO/O77 A13 A14...