Download CY24142 Datasheet PDF
CY24142 page 2
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CY24142 Description

Output Enable 1, 0 = CLK 2 and CLK3 off, 1 = CLK 2 and CLK3 on; Output Enable 2, 0 = CLK4 off, 1 = CLK4 on; 18.432-MHz Buffered Reference Output, controlled by OE1.

CY24142 Key Features

  • Integrated phase-locked loop (PLL)
  • Low-jitter, high-accuracy outputs
  • 3.3V operation
  • external loop filter ponents
  • Meets critical timing requirements in plex system designs
  • Enables application patibility