Download CY7C1020 Datasheet PDF
CY7C1020 page 2
Page 2
CY7C1020 page 3
Page 3

CY7C1020 Description

The input/output pins (I/O 1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020 is available in standard 44-pin TSOP type II and 400-mil-wide SOJ packages. Functional Description The CY7C1020 is a high-performance CMOS static RAM...

CY7C1020 Key Features

  • 5.0V operation (± 10%)
  • High speed
  • tAA = 10 ns
  • Low active power
  • 825 mW (max., 10 ns, “L” version)
  • Very Low standby power
  • 550 µW (max., “L” version)
  • Automatic power-down when deselected
  • Independent Control of Upper and Lower bytes