CY7C1021 Description
The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1021 is available in standard 44-pin TSOP Type II and 400-mil-wide SOJ packages. Functional Description The CY7C1021 is a high-performance CMOS static RAM...
CY7C1021 Key Features
- High speed
- tAA = 12 ns
- CMOS for optimum speed/power
- Low active power
- 1320 mW (max.)
- Automatic power-down when deselected
- Independent Control of Upper and Lower bits