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3D3521 Datasheet PDF

Data Delay Devices 3D3521

The 3D3521 is a monolithic CMOS Manchester Encoder. The clock and data, present at the unit input, are combined into a single bi-phaselevel signal. The unit operating baud rate (in Mbaud) is equal to the input clock frequency (in MHZ).
Part No. 3D3521
Datasheet 3D3521 Download
Manufacturer
Data Delay Devices
Description MONOLITHIC MANCHESTER ENCODER
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3D3521 datasheet page 1 preview

FEATURES

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● All-silicon, low-power CMOS technology 3.3V operation CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise Maximum data rate: 50 MBaud data 3 delay devices, inc. PACKAGES CLK N/C N/C 1 2 3 4 5 6 7 14 13 12 11 10 9 8  VDD N/C N/C N/C N/C TXB TX CLK RESB DAT GND 3D3521M 3D3521H 3D3521Z 1 2 3 4 8 7 6 5 VDD N/C TXB TX RESB DAT N/C GND DIP (.300) Gull Wing (.300) SOIC (.150) 3D3521 DIP (.300) 3D3521G Gull Wing (.300) 3D3521D SOIC (.150) For mechanical dimensions, click here. For package marking details, click here. FUNCTIONAL

DESCRIPTION

PIN DESCRIPTIONS DAT CLK RESB TX TXB VDD GND Data Input Clock Input Reset Signal Output Inverted Signal Output +3.3 Volts Ground In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition. All pins marked N/C must be left unconnected. The all-CMOS 3D3521 integrated circuit has been designed as a reliable, economic alternative to hybrid Manchester Encoders.
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