Data Delay Devices 3D3523
The 3D3523 is a monolithic CMOS Manchester Encoder/Decoder combo chip. The device uses bi-phase-level encoding to embed a clock signal into a data stream for transmission across a communications link. The Manchester encoder combines the clock (CIN) and data (DIN) into a single bi-phase-level signal (TX).| Part No. | 3D3523 |
|---|---|
| Datasheet | 3D3523 Download |
| Manufacturer |  Data Delay Devices |
| Description | MONOLITHIC MANCHESTER ENCODER/DECODER |
| Buy | Stock & Price |
FEATURES
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● All-silicon, low-power CMOS technology Encoder and decoder function independently Encoder has buffered clock output 3.3V operation Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise Maximum data rate: 50 MBaud Data rate range: ±15% Lock-in time: 1 bit For mechanical dimensions, click here. For package marking details, click here. CIN CEN RX COUT DIN RESB GND data 3 delay devices, inc. PACKAGES 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD CBUF LOOP TXENB DOUTB TXB TX 3D3523-xxx DIP (.300) 3D3523G-xxx Gull Wing (.300) 3D3523D-xxx SOIC (.150) FUNCTIONAL
DESCRIPTION
In this encoding mode, a logic one is represented by a high-to-low transition in the center of the bit cell, while a logic zero is represented by a low-to-high transition. An inverted version of this signal (TXB) is also available. The data baud rate (in MBaud) is equal to the input clock frequency (in MHz). A replica of the clock input is also available (CBUF). The encoder may be reset by setting the RESB input low; otherwise, it should be left high.
