3D7010G - MONOLITHIC 10-TAP FIXED DELAY LINE

This page provides the datasheet information for the 3D7010G, a member of the 3D7010 MONOLITHIC 10-TAP FIXED DELAY LINE family.

Datasheet Summary

Description

The 3D7010 10-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits.

Each package contains a single delay line, tapped and buffered at 10 points spaced uniformly in time.

Tap-to-tap (incremental) delay values can range from 8ns through 50ns.

Features

All-silicon, low-power CMOS technology.
TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP package) Low ground bounce noise Leading- and trailing-edge accuracy Delay range: 8 through 500ns Delay tolerance: 5% or 2ns Temperature stability: ±3% typical (0C-70C) Vdd stability: ±2% typical (4.75V-5.25V) Minimum input pulse width: 20% of total.

Data Delay Devices

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Datasheet Details

Part number	3D7010G
Manufacturer	Data Delay Devices
File Size	265.16 KB
Description	MONOLITHIC 10-TAP FIXED DELAY LINE
Datasheet	3D7010G Datasheet
Additional preview pages of the 3D7010G datasheet.

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Full PDF Text Transcription

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3D7010 MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7010) FEATURES • • • • • • • • • • • All-silicon, low-power CMOS technology* TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP package) Low ground bounce noise Leading- and trailing-edge accuracy Delay range: 8 through 500ns Delay tolerance: 5% or 2ns Temperature stability: ±3% typical (0C-70C) Vdd stability: ±2% typical (4.75V-5.25V) Minimum input pulse width: 20% of total delay IN N/C O2 O4 O6 O8 GND 1 2 3 4 5 6 7 PACKAGES 14 13 12 11 10 9 8 VDD O1 O3 O5 O7 O9 O10 IN N/C N/C O2 O4 O6 O8 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD N/C O1 O3 O5 O7 O9 O10 3D7010 DIP 3D7010G Gull-Wing 3D7010S SOL (300 Mil) For mechanical dimensions, click here.

Published: Jul 2, 2007 |