3D7105 - MONOLITHIC 5-TAP FIXED DELAY LINE

Datasheet Summary

Description

The 3D7105 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits.

Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time.

Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns.

Features

data 3 ® delay devices, inc.

Data Delay Devices

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Datasheet Details

Part number	3D7105
Manufacturer	Data Delay Devices
File Size	68.01 KB
Description	MONOLITHIC 5-TAP FIXED DELAY LINE
Datasheet	3D7105 Datasheet
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3D7105 www.DataSheet4U.com MONOLITHIC 5-TAP FIXED DELAY LINE (SERIES 3D7105) FEATURES • • • • • • • • • • • • data 3 ® delay devices, inc. PACKAGES IN N/C N/C O2 N/C O4 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD N/C O1 N/C O3 N/C O5 IN 1 8 VDD All-silicon, low-power CMOS VDD IN 1 8 O2 2 7 O1 technology O4 3 6 O3 O1 O2 2 7 GND 4 5 O5 TTL/CMOS compatible O3 O4 3 6 inputs and outputs 3D7105Z O5 GND 4 5 SOIC Vapor phase, IR and wave (150 Mil) solderable 3D7105M DIP Auto-insertable (DIP pkg.) 3D7105H Gull-Wing (300 Mil) Low ground bounce noise Leading- and trailing-edge accuracy IN 1 16 VDD Delay range: .75 through 80ns N/C 2 15 N/C Delay tolerance: 5% or 1ns N/C 3 14 N/C O2 4 13 O1 Temperature stability: ±3% typical (0C-70C) N/C 5 12 N/C O4 6 11 O3 Vdd stability: ±1% typical (4.75V-5.

Published: Aug 22, 2009 |