3D7110 - MONOLITHIC 10-TAP FIXED DELAY LINE

Datasheet Summary

Description

The 3D7110 10-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits.

Each package contains a single delay line, tapped and buffered at 10 points spaced uniformly in time.

Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns.

Data Delay Devices

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Datasheet Details

Part number	3D7110
Manufacturer	Data Delay Devices
File Size	266.01 KB
Description	MONOLITHIC 10-TAP FIXED DELAY LINE
Datasheet	3D7110 Datasheet
Additional preview pages of the 3D7110 datasheet.

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3D7110 www.DataSheet4U.com MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7110) FEATURES PACKAGES IN N/C O2 O4 O6 O8 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD O1 O3 O5 O7 O9 O10 • • • • • • • • • • • • All-silicon, low-power CMOS technology IN 1 14 VDD TTL/CMOS compatible inputs and outputs N/C 2 13 O1 Vapor phase, IR and wave solderable O2 3 12 O3 Auto-insertable (DIP pkg.) O4 4 11 O5 Low ground bounce noise Leading- and trailing-edge accuracy O6 5 10 O7 Delay range: .75 through 80ns O8 6 9 O9 Delay tolerance: 5% or 1ns GND 7 8 O10 Temperature stability: ±3% typical (0C-70C) 3D7110 DIP Vdd stability: ±1% typical (4.75V-5.

Published: Aug 22, 2009 |