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74LVC373A - OCTAL TRANSPARENT D-TYPE LATCH

General Description

The 74LVC373A provides eight transparent D-type latches.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.

When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

Key Features

  • Supply Voltage Range from 1.65V to 3.6V.
  • Sinks or Sources 24mA at VCC = 3V.
  • CMOS Low Power Consumption.
  • IOFF Supports Partial Power Down Operation.
  • Inputs or Outputs Accept Up to 5.5V.
  • Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage.

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Full PDF Text Transcription (Reference)

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NEW PRODUCT 74LVC373A OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS Description The 74LVC373A provides eight transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches.