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EDI8L32512C - 512K X 32 CMOS HIGH SPEED STATIC RAM

General Description

The EDI8L32512C is a high speed, 5V, 16 megabit SRAM.

The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP memory solution.

Key Features

  • 512K x 32 CMOS High Speed Static RAM n DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x n Random Access Memory Array • Fast Access Times: 12.
  • , 15, 17, and 20ns • TTL Compatible Inputs and Outputs • Fully Static, No Clocks n Surface Mount Package • 68 Lead PLCC, No. 99 JEDEC M0-47AE • Small Footprint, 0.990 Sq. In. • Multiple Ground Pins for Maximum Noise Immunity n Single +5V (±5%) Supply Operation.
  • Advance Information. FIG. 1 DQ16.

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Datasheet Details

Part number EDI8L32512C
Manufacturer Unknown Manufacturer
File Size 208.87 KB
Description 512K X 32 CMOS HIGH SPEED STATIC RAM
Datasheet download datasheet EDI8L32512C Datasheet

Full PDF Text Transcription for EDI8L32512C (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for EDI8L32512C. For precise diagrams, and layout, please refer to the original PDF.

EDI8L32512C FEATURES 512K x 32 CMOS High Speed Static RAM n DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x n Random A...

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• Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x n Random Access Memory Array • Fast Access Times: 12*, 15, 17, and 20ns • TTL Compatible Inputs and Outputs • Fully Static, No Clocks n Surface Mount Package • 68 Lead PLCC, No. 99 JEDEC M0-47AE • Small Footprint, 0.990 Sq. In. • Multiple Ground Pins for Maximum Noise Immunity n Single +5V (±5%) Supply Operation * Advance Information. FIG. 1 DQ16 A18 A17 E3 E2 E1 E0 NC VCC NC NC G W A16 A15 A14 DQ15 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ17 DQ18 DQ19 V SS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 V SS DQ28 DQ29 DQ30 Note: For memory upgrade information, ref