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C-MOS 4 M (262,144 W X 16)-BIT DRAM
—TOP VIEW— V 1S a t2 3 4
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INPUT A0 - A8
HM51W4265CLTT-6 IL08
GND 44 43 I/O15 I/O 42 I/O14 I/O 41 I/O13 I/O 40 I/O12 I/O GND 39 38 I/O11 I/O 37 I/O10 I/O 36 I/O9 I/O 35 I/O8 I/O
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a D I/O1 . wI/O2
I/O0 I/O
I/O I/O
LCAS OE RAS UCAS WE
: : : : : :
ADDRESS COLUMN ADDRESS STROBE OUTPUT ENABLE ROW ADDRESS STROBE COLUMN ADDRESS STROBE READ/WRITE ENABLE
I/O3 I/O 5 6 VDD I/O4 I/O 7 I/O5 I/O 8 I/O6 I/O 9 I/O7 I/O 10
INPUT/OUTPUT I/O0 - I/O15 : DATA
13 NC 14 NC
NC 32 31 30 29
LCAS IN
WE IN 15 RAS IN 16
17 NC A0 IN 18 A1 IN 19 A2 IN 20 A3 IN 21
UCAS IN OE IN
22 VDD
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GND 23
28 A8 IN 27 A7 IN 26 A6 IN 25 A5 IN 24 A4 IN
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HM51W4265CLTT-6 Datasheet