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QL2009-2PQ208I Datasheet 3.3V and 5.0V pASIC 2 FPGA Combining Speed/ Density/ Low Cost and Flexibility

Manufacturer: Unknown Manufacturer

Overview: 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev.

Download the QL2009-2PQ208I datasheet PDF. This datasheet also includes the QL2 variant, as both parts are published together in a single manufacturer document.

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Datasheet Details

Part number QL2009-2PQ208I
Manufacturer Unknown Manufacturer
File Size 272.83 KB
Description 3.3V and 5.0V pASIC 2 FPGA Combining Speed/ Density/ Low Cost and Flexibility
Download QL2009-2PQ208I Download (PDF)

Key Features

  • -3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2009 Block Diagram 672 Logic Cells 3-35 QL2009.

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