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QL2003 Datasheet PDF

QL QL2003

The QL2003 is a 3,000 usable ASIC gate, 5,000 usable PLD gate member of the pASIC 2 family of FPGAs. The flexibility and speed make pASIC 2 devices an efficient and high performance silicon solution for designs described using HDLs such as Verilog and VHDL, as well as schematics. The QL2003 contains 192 logic cells.
Part No. QL2003
Datasheet QL2003 Download
Manufacturer QL
Description Low Cost and Flexibility
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QL2003 datasheet page 1 preview

FEATURES

-3.3V and 5.0V operation with low standby power -I/O pin-compatibility between different devices in the same packages -PCI compliant (at 5.0V), full speed 33 MHz implementations -High design security provided by security fuses QL2003 Block Diagram 192 Logic Cells 3-5 QL2003 PRODUCT SUMMARY pASIC 2 FPGAs employ a unique combination of architecture, technology, and software tools to provide high speed, high usable density, low price, and flexibility in the same devices. The QL2003 contains 192 logic cells. With 118 maximum I/Os, the QL2003 is available in 84-PLCC, 100-pin TQFP and 144-pin TQFP packages. Software support for the complete pASIC families, including the QL2003, is available through three basic packages. The turnkey QuickWorks® package provides the most complete FPGA software solution from design entry to logic synthesis (by Synplicity, Inc.), to place and route, to simulation. The QuickToolsTM and QuickChipTM packages provide a solution for designers who use Cadence, Mentor, Synopsys, Viewlogic, Veribest, or other thirdparty tools for design entry, synthesis, or simulation.
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