UT54ACS10 Datasheet | Unknown Manufacturer

FEATURES PINOUTS 14-Pin DIP Top View A1 B1 A2 B2 C2 Y2 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD C1 Y1 C3 B3 A3 Y3 - - - Low power consumption .. - Single 5 volt supply - Available QML Q or V processes - Flexible package - 14-pin DIP - 14-lead flatpack DESCRIPTION The UT54ACS10 and the UT54ACTS10 are triple three-input NAND gates. The circuits perform the Boolean functions Y = A B C or Y = A + B + C in positive logic. The devices are characterized over full military temperature range of -55 C to +125 C. FUNCTION TABLE INPUTS A H L X X B H X L X C H X X L OUTPUT Y L H H H A1 B1 C1 A2 B2 C2 A3 B3 C3 (6) Y2 radiation-hardened CMOS - Latchup immune High speed 14-Lead Flatpack Top View A1 B1 A2 B2 C2 Y2 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD C1 Y1 C3 B3 A3 Y3 LOGIC DIAGRAM Y1 LOGIC SYMBOL A1 B1 C1 A2 B2 C2 A3 B3 C3 (1) (2) (13) (3) (4) (5) (9) (10) (11) (8) Y3 (12) Y1 Y2 Y3 Note:. 1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12. Rad Hard MSI Logic UT54ACS10/UT54ACTS10 RADIATION HARDNESS SPECIFICATIONS 1 PARAMETER Total Dose SEU Threshold2 SEL Threshold Neutron Fluence LIMIT 1.0E6 80 120 1.0E14 UNITS rads(Si) Me V-cm2/mg Me V-cm2/mg n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. .. ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Voltage any pin Storage Temperature range Maximum junction temperature Lead temperature (soldering 5 seconds) Thermal resistance junction to case DC input current Maximum power dissipation LIMIT -0.3 to 7.0 -.3 to VDD +.3 -65 to +150 +175 +300 20 10 1 UNITS V V C C C C/W m A W SYMBOL VDD VI/O TSTG TJ TLS II PD Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not...