EBE52EC8AAFA - 512MB Unbuffered DDR2 SDRAM DIMM

Description

The EBE52EC8AAFA is 64M words × 72 bits, 2 ranks DDR2 SDRAM unbuffered module, mounting 18 pieces of 256M bits DDR2 SDRAM sealed in FBGA (µBGA) package.

Read and write operations are performed at the cross points of the CK and the /CK.

Features

240-pin socket type dual in line memory module (DIMM)  PCB height: 30.0mm  Lead pitch: 1.0mm  Lead-free.
1.8V power supply.
Data rate: 533Mbps/400Mbps (max. ).
1.8V (SSTL_18 compatible) I/O.
Double-data-rate architecture: two data transfers per clock cycle.
Bi-directional, differential data strobe (DQS and /DQS) is transmitted/received with data, to be used in capturing data at the receiver.
DQS is edge aligned with data for READs.

Elpida Memory

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Datasheet Details

Part number	EBE52EC8AAFA
Manufacturer	Elpida Memory
File Size	233.80 KB
Description	512MB Unbuffered DDR2 SDRAM DIMM
Datasheet	EBE52EC8AAFA Datasheet
Additional preview pages of the EBE52EC8AAFA datasheet.

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EBE51ED8ABFA - 512MB Unbuffered DDR2 SDRAM DIMM

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PRELIMINARY DATA SHEET www.DataSheet4U.com 512MB Unbuffered DDR2 SDRAM DIMM EBE52EC8AAFA (64M words × 72 bits, 2 Ranks) Description The EBE52EC8AAFA is 64M words × 72 bits, 2 ranks DDR2 SDRAM unbuffered module, mounting 18 pieces of 256M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 4 bits prefetchpipelined architecture. Data strobe (DQS and /DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. This module provides high density mounting without utilizing surface mount technology.

Published: Mar 21, 2010 |