Datasheet4U Logo Datasheet4U.com

EDS2532JEBH-6B - 256M bits SDRAM

Features

  • ×32 organization.
  • Single pulsed /RAS.
  • Burst read/write operation and burst read/single write operation capability.
  • Byte control by DQM (Top view) A0 to A11 BA0, BA1 DQ0 to DQ31 /CS /RAS /CAS /WE DQM0 to DQM3 CKE CLK VDD VSS VDDQ VSSQ NC Address inputs Bank select address Data-input/output Chip select Row address strobe Column address strobe Write enable DQ mask enable Clock enable Clock input Power for internal circuit Ground for internal circuit Power for D.

📥 Download Datasheet

Datasheet preview – EDS2532JEBH-6B

Datasheet Details

Part number EDS2532JEBH-6B
Manufacturer Elpida Memory
File Size 700.37 KB
Description 256M bits SDRAM
Datasheet download datasheet EDS2532JEBH-6B Datasheet
Additional preview pages of the EDS2532JEBH-6B datasheet.

📁 Similar Datasheet

  • EDS801 - Display Module (ETC)
  • EDS802 - Display (ETC)
  • EDS803 - Display Module (DALIAN GOOD DISPLAY)
  • EDS803 - Display Module (ETC)
  • EDS805 - Display Module (DALIAN GOOD DISPLAY)
  • EDS805 - Display Module (ETC)
Other Datasheets by Elpida Memory

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com PRELIMINARY DATA SHEET 256M bits SDRAM EDS2532JEBH-6B (8M words × 32 bits) Specifications • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Clock frequency: 166MHz (max.) • 2KB page size ⎯ Row address: A0 to A11 ⎯ Column address: A0 to A8 • Four internal banks for concurrent operation • Interface: LVCMOS • Burst lengths (BL): 1, 2, 4, 8, full page • Burst type (BT): ⎯ Sequential (1, 2, 4, 8, full page) ⎯ Interleave (1, 2, 4, 8) • /CAS Latency (CL): 2, 3 • Precharge: auto precharge operation for each burst access • Driver strength: half/quarter • Refresh: auto-refresh, self-refresh • Refresh cycles: 4096 cycles/64ms ⎯ Average refresh period: 15.
Published: |