Description
The EDS6416AHBH, EDS6416CHBH are 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks.
Features
- 3.3V and 2.5V power supply Clock frequency: 166MHz/133MHz (max. ) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently.
- Burst read/write operation and burst read/single write operation capability.
- 2 variations of burst sequence Sequential (BL = 1, 2, 4, 8, full page) Interleave (BL = 1, 2, 4, 8).
- Programmable /CAS latency (CL): 2, 3.
- Byte control by UDQM and LDQM.
EDS6416AHBH Datasheet
