EDS6416CHBH Datasheet | Elpida Memory

Description The EDS6416AHBH, EDS6416CHBH are 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks. All inputs and outputs are synchronized with .. the positive edge of the clock. Supply voltages are 3.3V (EDS6416AHBH) and 2.5V (EDS6416CHBH). It is packaged in 60-ball FBGA. Pin Configurations /xxx indicate active low signal. 60-ball FBGA 1 A VSS B DQ15 DQ0 VDD Features - - - - - 3.3V and 2.5V power supply Clock frequency: 166MHz/133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently - Burst read/write operation and burst read/single write operation capability - 2 variations of burst sequence  Sequential (BL = 1, 2, 4, 8, full page)  Interleave (BL = 1, 2, 4, 8) - Programmable /CAS latency (CL): 2, 3 - Byte control by UDQM and LDQM - Refresh cycles: 4096 refresh cycles/64ms - 2 variations of refresh  Auto refresh  Self refresh - FBGA package with lead free solder (Sn-Ag-Cu)  Ro HS pliant DQ14 VSSQ VDDQ DQ1 DQ13 VDDQ VSSQ DQ2 DQ12 DQ11 DQ4 DQ3 DQ10 VSSQ VDDQ DQ5 DQ9 VDDQ VSSQ DQ6 DQ8 NC NC...