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EM44CM1688LBC - Double DATA RATE SDRAM

General Description

The EM44CM1688LBC is a high speed Double Date Rate 2 (DDR2) Synchronous DRAM fabricated with ultra high performance CMOS process containing 1,073,741,824 bits which organized as 16Mbits x 8 banks by 16 bits.

Key Features

  • JEDEC Standard VDD/VDDQ = 1.8V±0.1V.
  • All inputs and outputs are compatible with SSTL_18 interface.
  • Fully differential clock inputs (CK, /CK) operation.
  • Eight Banks.
  • Posted CAS.
  • Bust length: 4 and 8.
  • Programmable CAS Latency (CL): 5, 6.
  • Programmable Additive Latency (AL): 0, 1, 2, 3, 4, 5.
  • Write Latency (WL) =Read Latency (RL) -1.
  • Read Latency (RL) = Programmable Additive Latency (AL) + CAS Latency (CL.

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Datasheet Details

Part number EM44CM1688LBC
Manufacturer Eorex
File Size 610.06 KB
Description Double DATA RATE SDRAM
Datasheet download datasheet EM44CM1688LBC Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Revision History Revision 0.1 (Jan. 2013) -First release. Revision 0.2 (Feb. 2014) - Update DC current. Revision 0.3 (Apr. 2014) - Update Temperature. EM44CM1688LBC Apr. 2014 1/29 www.eorex.com EM44CM1688LBC 1Gb (8M×8Bank×16) Double DATA RATE 2 SDRAM Features • JEDEC Standard VDD/VDDQ = 1.8V±0.1V. • All inputs and outputs are compatible with SSTL_18 interface. • Fully differential clock inputs (CK, /CK) operation. • Eight Banks • Posted CAS • Bust length: 4 and 8. • Programmable CAS Latency (CL): 5, 6 • Programmable Additive Latency (AL): 0, 1, 2, 3, 4, 5 • Write Latency (WL) =Read Latency (RL) -1. • Read Latency (RL) = Programmable Additive Latency (AL) + CAS Latency (CL) • Bi-directional Differential Data Strobe (DQS). • Data inputs on DQS centers when write.