EM48BM0884VTA Datasheet | Eorex

Features Description - Fully Synchronous to Positive Clock Edge - Single 3.3V ±0.3V Power Supply - LVTTL patible with Multiplexed Address - Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page - Programmable CAS Latency (C/L) - 3 - Data Mask (DQM) for Read / Write Masking - Programmable Wrap Sequence - Sequential (B/L = 1/2/4/8/full Page) - Interleave (B/L = 1/2/4/8) - Burst Read with Single-bit Write Operation - All Inputs are sampled at the Rising Edge of the System Clock - Auto Refresh and Self Refresh - 8,192 Refresh Cycles / 64ms The EM48BM0884VTA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 8Meg words x 4 banks by 8 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 256Mb SDRAM uses synchronized pipelined architecture to achieve...