EM48BM3244VBA Datasheet | Eorex

Features EM488M3244VBA 256Mb (2M×4Bank×32) Synchronous DRAM Description The EM488M3244VBA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 256Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 3.3V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are patible with LVTTL. Available packages: TFBGA-90B(13mmx8mm). - Fully Synchronous to Positive Clock Edge - Single 3.3V ±0.3V Power Supply - LVTTL patible with Multiplexed Address - Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page - Programmable CAS Latency (C/L) - 2 or 3 - Data Mask (DQM) for Read / Write Masking - Programmable Wrap Sequence - Sequential (B/L = 1/2/4/8/full Page) - Interleave (B/L = 1/2/4/8) - Burst Read with Single-bit Write Operation - All Inputs are Sampled at the Rising Edge of the System Clock - Auto Refresh and Self Refresh - 4,096 Refresh Cycles / 64ms (15.625us) Ordering Information Part No EM488M3244VBA-75F Organization 8M X 32 Max. Freq 133MHz @CL3 Package TFBGA -90B Grade mercial Pb Free - EOREX reserves the right to change products or specification without notice. Jul. 2006 1/17 .eorex. eorex Pin Assignment 1 DQ26 DQ28 VSSQ VSSQ VDDQ VSS A4 A7 CLK DQM1 VDDQ VSSQ VSSQ DQ11 DQ13 DQ24 VDDQ DQ27 DQ29 DQ31 DQM3 A5 A8 CKE NC DQ8 DQ10 DQ12 VDDQ DQ15 2 VSS VSSQ DQ25 DQ30 NC A3 A6 NC A9 NC VSS DQ9 DQ14 VSSQ VSS 3 A B C D E F G H J K L M N P R VDD EM488M3244VBA 7 DQ23 8 DQ21...