Datasheet4U Logo Datasheet4U.com

EM637327 - 1Mega x 32 SGRAM

This page provides the datasheet information for the EM637327, a member of the EM6 1Mega x 32 SGRAM family.

Description

Table 1.

Pin Details of EM637327 Symbol Type Description CLK Input Clock: CLK is driven by the system clock.

All SGRAM input signals are sampled on the positive edge of CLK.

Features

  • EM637327 1Mega x 32 SGRAM Preliminary (08/99) Pin Assignment (Top View) DQ29 VSSQ DQ30 DQ31 VSS NC NC NC NC NC NC NC NC NC NC V DD DQ0 DQ1 VSSQ DQ2.
  • Fast access time from clock: 4.5/5.5/5.5/6 ns Fast clock rate: 200/166/143/125 MHz Fully synchronous operation Internal pipelined architecture Dual internal banks (512K x 32bit x 2bank) Programmable Mode - CA.

📥 Download Datasheet

Datasheet preview – EM637327

Datasheet Details

Part number EM637327
Manufacturer Etron Technology Inc.
File Size 1.14 MB
Description 1Mega x 32 SGRAM
Datasheet download datasheet EM637327 Datasheet
Additional preview pages of the EM637327 datasheet.

📁 Similar Datasheet

  • EM6352 - Voltage Detecto (EM Microelectronic - MARIN SA)
  • EM6353 - Reset Circuit (EM Microelectronic - MARIN SA)
  • EM6354 - Reset Circuit (EM Microelectronic - MARIN SA)
  • EM636165 - 1M x 16 Synchronous DRAM (Etron)
  • EM636165-XXI - 1Mega x 16 Synchronous DRAM (Etron Technology)
  • EM638165 - 4M x 16 bit Synchronous DRAM (Etron Technology)
  • EM638165TS - 4M x 16 bit Synchronous DRAM (Etron Technology)
  • EM638325 - 2M x 32 Synchronous DRAM (Etron Technology)
  • EM639165 - 8M x 16 bit Synchronous DRAM (Etron Technology)
  • EM639165TS - 8M x 16 bit Synchronous DRAM (Etron Technology)
Other Datasheets by Etron Technology Inc.
  • EM636327 - 512K x 32 High Speed Synchronous Graphics DRAM(SGRAM)
  • EM658160 - 4M x 16 DDR Synchronous DRAM
  • EM6A9320 - 4M x 32 DDR SDRAM

Full PDF Text Transcription

Click to expand full text
EtronTech Features • • • • • • EM637327 1Mega x 32 SGRAM Preliminary (08/99) Pin Assignment (Top View) DQ29 VSSQ DQ30 DQ31 VSS NC NC NC NC NC NC NC NC NC NC V DD DQ0 DQ1 VSSQ DQ2 • • • • • • • • Fast access time from clock: 4.5/5.5/5.5/6 ns Fast clock rate: 200/166/143/125 MHz Fully synchronous operation Internal pipelined architecture Dual internal banks (512K x 32bit x 2bank) Programmable Mode - CAS# Latency: 1, 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: interleaved or linear burst - Burst-Read-Single-Write - Load Color or Mask register Burst stop function Individual byte controlled by DQM0-3 Block write and write-per-bit capability Auto Refresh and Self Refresh 2048 refresh cycles/32ms Single +3.3V ± 0.
Published: |