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XRT91L33A
STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT
JUNE 2010
REV. 1.0.1
FEATURES
Performs clock and data recovery for selectable
data of 622.08 Mbps (STS-12/STM-4) or 155.52 Mbps (STS-3/STM-1) NRZ data
Meets Telcordia, ANSI and ITU-T G.783 and G.825
SDH jitter requirements including T1.105.03 - 2002 SONET Jitter Tolerance specification, and GR-253 CORE, GR-253 ILR SONET Jitter specifications.
LOCK is a status output that monitors data run
length and frequency drift away from the reference clock
Data is resampled at the output
Active High Signal Detect (SIGD) LVPECL input
Low jitter, high-speed outputs support LVPECL and
low-power LVDS termination
19.44 MHz reference frequency LVTTL input
Low power: 215 mW typical
3.
XRT91L33A Datasheet
