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EMB20P03G
P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
D
BVDSS
‐30V
RDSON (MAX.)
20mΩ
ID
‐10A
G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=‐10A, RG=25Ω L = 0.05mH
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
±25 ‐10 ‐8 ‐40 ‐15 5 2.5 2.5 1 ‐55 to 150
100% UIS testing in condition of VD=‐15V, L=0.