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P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
D
BVDSS
‐30V
RDSON (MAX.)
20mΩ
ID
‐8A
G
S Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1
VGS
TC = 25 °C ID
TC = 100 °C
IDM
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1％
385°C / W when mounted on a 1 in2 pad of 2 oz copper.
TYPICAL
EMB20P03P
LIMITS ±25 ‐8 ‐6 ‐32 1.47 0.
EMB20P03P Datasheet
