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EMD12N10E
N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
100V
D
RDSON (MAX.)
11.5mΩ
ID
95A
G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=90A, RG=25Ω
L = 0.05mH
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
±30 95 67 280 90 405 202 166 66 ‐55 to 150
100% UIS testing in condition of VD=50V, L=0.
EMD12N10E Datasheet
