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N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
100V
D
RDSON (MAX.)
12mΩ
ID
50A
G
UIS, Rg 100% Tested
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TC = 25 °C TC = 100 °C
Avalanche Current
Avalanche Energy Repetitive Avalanche Energy2
L = 0.1mH, ID=50A, RG=25Ω
L = 0.05mH
Power Dissipation
TC = 25 °C TC = 100 °C
Operating Junction & Storage Temperature Range
VGS ID
IDM IAS EAS EAR PD
Tj, Tstg
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient
RJA
1Pulse width limited by maximum junction temperature.
EMD12N10H Datasheet
