EMD50N15E Datasheet | Excelliance MOS

N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 150V RDSON (MAX.) 50mΩ 48A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Drain‐Source Voltage Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.2m H, IAS=18A, RG=25Ω L = 0.1m H Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VDSS VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐to‐Ambient RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1％ TYPICAL 2017/9/28 LIMITS 150 ±30 48 30 140 18 32.4 16.2 104 41 ‐55 to...