EMD50N15G Datasheet | Excelliance MOS

N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 150V RDSON (MAX.) 50mΩ 7A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Drain‐Source Voltage Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TA = 25 °C TA = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.2m H, ID=7A, RG=25Ω L = 0.1m H Power Dissipation TA = 25 °C TA = 100 °C Operating Junction & Storage Temperature Range VDSS VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐to‐Ambient3 RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1％ 350°C / W when mounted on a 1 in2 pad of 2 oz copper. 2012/5/22 TYPICAL LIMITS 150 ±30 7 4.5 28 7 4.9 2.45 2.5...