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74S175 - Hex/Quad D Flip-Flop

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General Description

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop lo gic.

All h ave a d irect cle ar input, and the quad (DM74S175) versions

Overview

DM74S174 • DM74S175 Hex/Quad D Flip-Flop with Clear August 1986 Revised April 2000 DM74S174 • DM74S175 Hex/Quad D Flip-Flop with.

Key Features

  • s DM74S174 contain six flip-flops with single-rail outputs. s DM74S175 con tain fo ur fl ip-flops w ith do uble-rail outputs. s Buffered clock and direct clear inputs s Individual data input to each flip-flop s.

More Datasheets from Fairchild (now onsemi)

Part Number Description
74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
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74S189 64-Bit RAM
74S08 Quad 2-Input AND Gate
74S08N Quad 2-Input AND Gate