74S175 Overview
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop lo gic. All h ave a d irect cle ar input, and the quad (DM74S175) versions.
| Part number | 74S175 |
|---|---|
| Datasheet | 74S175-FairchildSemiconductor.pdf |
| File Size | 142.59 KB |
| Manufacturer | Fairchild (now onsemi) |
| Description | Hex/Quad D Flip-Flop |
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These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop lo gic. All h ave a d irect cle ar input, and the quad (DM74S175) versions.
See all Fairchild (now onsemi) datasheets
| Part Number | Description |
|---|---|
| 74S112 | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
| 74S138 | Decoder/Demultiplexer |
| 74S139 | Decoder/Demultiplexer |
| 74S140 | Dual 4-Input NSND Line Driver |
| 74S153 | Dual 1-of-4 Line Data Selector/Multiplexer |
| 74S157 | Quad 1 of 2 Line Data Selectors/Multiplexers |
| 74S158 | Quad 1 of 2 Line Data Selectors/Multiplexers |
| 74S189 | 64-Bit RAM |
| 74S08 | Quad 2-Input AND Gate |
| 74S08N | Quad 2-Input AND Gate |