74VCX32244 Datasheet | Fairchild Semiconductor

Description The VCX32244 contains thirty-two non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for 8-bit, 16-bit or full 32-bit operation. The 74VCX32244 is designed for low voltage (1.2V to 3.6V) VCC applications with I/O capability up to 3.6V. The 74VCX32244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. Features s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s t PD 2.5 ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal (Note 1) s Static Drive (IOH/IOL) ±24 m A @ 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 m A s ESD performance: Human body model > 2000V Machine model > 200V s Packages in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number 74VCX32244G (Note 2)(Note 3) Package Number BGA96A Package Description 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2002 Fairchild Semiconductor Corporation DS500416 .fairchildsemi. Connection Diagram Truth Tables Inputs OE1 L L H Inputs OE2 L L H Inputs OE3 L L H I8-I11 L H X Inputs OE4 L I12-I15 L H X Inputs OE5 L L 5 I0 I2 I4 I6 I8 I10 I12 I15 I16 I18 I20 I22 I24 I26 I28 I31 6 I1 I3 I5 I7 I9 I11 I13 I14 I17 I19 I21 I23 I25 I27 I29 I30 OE8 L L H OE7 L L H Inputs...