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FCPF600N60Z - N-Channel MOSFET

Download the FCPF600N60Z datasheet PDF. This datasheet also covers the FCP600N60Z variant, as both devices belong to the same n-channel mosfet family and are provided as variant models within a single manufacturer datasheet.

General Description

® ® SuperFET II MOSFET is Fairchild Semiconductor ’s first generation of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance.This advanced technology is tailored to minimize conduction loss, pr

Key Features

  • 650 V @TJ = 150°C.
  • Max. RDS(on) = 600 mΩ.
  • Ultra Low Gate Charge (Typ. Qg = 20 nC).
  • Low Effective Output Capacitance (Typ. Coss. eff = 74 pF).
  • 100% Avalanche Tested.
  • ESD Improved Capacity.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (FCP600N60Z_FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Fairchild (now onsemi)

Part Number Description
FCPF650N80Z MOSFET
FCPF067N65S3 N-Channel MOSFET
FCPF11N60 SuperFET MOSFET
FCPF11N60F 600V N-Channel MOSFET
FCPF11N60NT N-Channel MOSFET

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FCP600N60Z / FCPF600N60Z N-Channel MOSFET March 2013 FCP600N60Z / FCPF600N60Z N-Channel SuperFET® II MOSFET 600 V, 7.4 A, 600 mΩ Features • 650 V @TJ = 150°C • Max. RDS(on) = 600 mΩ • Ultra Low Gate Charge (Typ. Qg = 20 nC) • Low Effective Output Capacitance (Typ. Coss.eff = 74 pF) • 100% Avalanche Tested • ESD Improved Capacity Description ® ® SuperFET II MOSFET is Fairchild Semiconductor ’s first generation of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance.This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate and higher avalanche energy.