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FIN1532 - 5V LVDS 4-Bit High Speed Differential Receiver

General Description

This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology.

The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels.

Key Features

  • s Greater than 400Mbs data rate s 5V power supply operation s 0.5 ns maximum differential pulse skew s 3 ns maximum propagation delay s Low power dissipation s Power-Off protection for inputs and outputs s Fail safe protection for open-circuit, shorted and terminated receiver inputs s Meets or exceeds the TIA/EIA-644 LVDS standard s Pin compatible with equivalent RS-422 and PECL devices s 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number FIN1532M FIN1532MTC Package Number M.

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FIN1532 5V LVDS 4-Bit High Speed Differential Receiver December 2001 Revised December 2001 FIN1532 5V LVDS 4-Bit High Speed Differential Receiver General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. The FIN1532 can be paired with its companion driver, the FIN1531, or any other LVDS driver. Features s Greater than 400Mbs data rate s 5V power supply operation s 0.