Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
Features
- -9.4A, -100V, RDS(on) = 0.29Ω @VGS = -10 V Low gate charge ( typical 21 nC) Low Crss ( typical 65 pF) Fast switching 100% avalanche tested Improved dv/dt capability
D
D
G
S
D-PAK
FQD Series
I-PAK
G D S
FQU Series
G
S
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD
TC = 25°C unless otherwise noted
Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current.