Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild s proprietary, planar stripe, DMOS technology.
Features
- -11.4 A, -60 V, RDS(on) = 175 mΩ (Max. ) @ VGS = -10 V, ID = -5.7 A.
- Low Gate Charge (Typ. 13 nC).
- Low Crss (Typ. 45 pF).
- 100% Avalanche Tested.
- 175oC Maximum Junction Temperature Rating
S
G
GDS
TO-220
Absolute Maximum Ratings TC = 25oC unless otherwise noted. Symbol VDSS ID
IDM VGSS EAS IAR EAR dv/dt PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C) - Continuous (TC = 100°C)
Drain Current - Pulsed
(Note.
FQP11P06 Datasheet
