74F433 Datasheet | Fairchild Semiconductor

Description The 74F433 is an expandable fall-through type high-speed First-In First-Out (FIFO) Buffer Memory that is optimized for high-speed disk or tape controller and munication buffer applications. It is organized as 64-words by 4-bits and may be expanded to any number of words or any number of bits in multiples of four. Data may be entered or extracted asynchronously in serial or parallel, allowing economical implementation of buffer memories. The 74F433 has 3-STATE outputs that provide added versatility, and is fully patible with all TTL families. Features s Serial or parallel input s Serial or parallel output s Expandable without additional logic s 3-STATE outputs s Fully patible with all TTL families s Slim 24-pin package s 9423 replacement Ordering Code: Order Number 74F433SPC Package Number N24C Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Logic Symbol Connection Diagram © 1999 Fairchild Semiconductor Corporation DS009544 .fairchildsemi. Unit Loading/Fan Out U.L. Pin Names PL CPSI IES TTS MR OES TOP TOS CPSO OE D0- D3 DS Q0- Q3 QS IRF ORE Description HIGH/LOW Parallel Load Input Serial Input Clock Serial Input Enable Transfer to Stack Input Master Reset Serial Output Enable Transfer Out Parallel Transfer Out Serial Serial Output Clock Output Enable Parallel Data Inputs Serial Data Input Parallel Data Outputs Serial Data Output Input Register Full Output Register Empty 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 1.0/0.66 285/10 285/10 20/5 20/5 Input IIH/IIL Output IOH/IOL 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 20 µA/400 µA 5.7 m A/16 m A 5.7 µA/16 m A 400 µA/8 m A 400 µA/8 m A Block Diagram .fairchildsemi. Functional Description As shown in the block diagram, the 74F433 consists of three sections: 1. An Input Register with parallel...