NDS332P Overview
Key Specifications
Pins: 3
Width: 3.05 mm
Max Operating Temp: 150 °C
Min Operating Temp: -55 °C
Description
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance.
Key Features
- 1 A, -20 V, RDS(ON) = 0.41 Ω @ VGS= -2.7 V RDS(ON) = 0.3 Ω @ VGS = -4.5 V
- Very low level gate drive requirements allowing direct operation in 3V circuits
- Proprietary package design using copper lead frame for superior thermal and electrical capabilities
- High density cell design for extremely low RDS(ON)
- Exceptional on-resistance and
